DocumentCode :
2927975
Title :
VLSI architectures for digital image coding
Author :
Yan, M. ; McCanny, J. ; Hu, Y.
Author_Institution :
Dept., of Electr. & Electron. Eng., Queen´´s Univ. of Belfast, UK
fYear :
1990
fDate :
3-6 Apr 1990
Firstpage :
913
Abstract :
A number of high-performance VLSI architectures for real-time image coding applications are described. In particular, attention is focused on circuits for computing the 2D DCT (discrete cosine transform) and for 2-D vector quantization. The former circuits are based on Winograd algorithms and compromise a number of bit-level systolic arrays with a bit-serial, word-parallel input. The latter circuits exhibit a similar data organization and consist of a number of inner product array circuits. Both circuits are highly regular and allow extremely high data rates to be achieved through extensive use of parallelism
Keywords :
Fourier transforms; computerised picture processing; decoding; digital signal processing chips; encoding; parallel architectures; real-time systems; systolic arrays; 2-D vector quantization; 2D DCT; DSP chip; VLSI architectures; Winograd algorithms; bit serial/word parallel input; bit-level systolic arrays; digital image coding; discrete cosine transform; inner product array circuits; Circuits; Computer architecture; Digital images; Discrete cosine transforms; Image coding; Parallel processing; Systolic arrays; Two dimensional displays; Vector quantization; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1990. ICASSP-90., 1990 International Conference on
Conference_Location :
Albuquerque, NM
ISSN :
1520-6149
Type :
conf
DOI :
10.1109/ICASSP.1990.115996
Filename :
115996
Link To Document :
بازگشت