DocumentCode :
2928255
Title :
Communication/synchronisation mechanism for multiprocessor on Chip architectures
Author :
Zertal, Soraya ; Timsit, Claude ; Chatti, Majed
Author_Institution :
Univ. of Versailles, Versailles, France
fYear :
2009
fDate :
5-8 July 2009
Firstpage :
62
Lastpage :
66
Abstract :
Inter-processors communication and synchronisation is a key factor to guarantee a good performance for critical applications on multi-core embedded architectures. A communication/ synchronisation mechanism based on mailboxes is proposed here. Its principle and implementation at a low hardware level are detailed. It´s efficiency is validated using the corner turn algorithm, frequently used in main embedded real time applications as signal and image processing for which reliable and efficient communication and synchronisation are highly required. The simplicity, the efficiency and the reduced cost of the proposed mechanism are confirmed. Its implementation in systemC is in progress for test and a quantitative evaluation of its performance.
Keywords :
embedded systems; microprocessor chips; chip architectures; communication-synchronisation mechanism; corner turn algorithm; interprocessors communication; multi-core embedded architectures; multiprocessor; systemC; Central Processing Unit; Centralized control; Costs; Decoding; Hardware; Image processing; Read-write memory; Signal processing; Signal processing algorithms; System testing; Architecture on Chip; Communication; Mailbox; Mutliprocessor; Synchronisation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computers and Communications, 2009. ISCC 2009. IEEE Symposium on
Conference_Location :
Sousse
ISSN :
1530-1346
Print_ISBN :
978-1-4244-4672-8
Electronic_ISBN :
1530-1346
Type :
conf
DOI :
10.1109/ISCC.2009.5202412
Filename :
5202412
Link To Document :
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