Author :
Weber, O. ; Faynot, O. ; Andrieu, F. ; Buj-Dufournet, C. ; Allain, F. ; Scheiblin, P. ; Foucher, J. ; Daval, N. ; Lafond, D. ; Tosti, L. ; Brevard, L. ; Rozeau, O. ; Fenouillet-Beranger, I. ; Marin, M. ; Boeuf, F. ; Delprat, D. ; Bourdelle, K. ; Nguyen, B
Abstract :
Sources responsible for local and inter-die threshold voltage (Vt) variability in undoped ultra-thin FDSOI MOSFETs with a high-k/metal gate stack are experimentally discriminated for the first time. Charges in the gate dielectric and/or TiN gate workfunction fluctuations are determined as major contributors to the local Vt variability and it is found that SOI thickness (TSi) variations have a negligible impact down to TSi=7 nm. Moreover, TSi scaling is shown to limit both local and inter-die Vt variability induced by gate length fluctuations. The highest matching performance ever reported for 25 nm gate length MOSFETs is achieved (AVt=0.95 mV.mum), demonstrating the effectiveness of the undoped ultra-thin FDSOI architecture in terms of Vt variability control.
Keywords :
MOSFET; silicon-on-insulator; titanium compounds; TiN; fully depleted silicon-on-insulator; gate dielectric; gate stack; gate workfunction fluctuations; size 25 nm; threshold voltage variability; undoped ultrathin FDSOI MOSFET; CMOS technology; Current measurement; Fluctuations; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; MOSFETs; Testing; Threshold voltage; Tin;
