Improving parallel MPSoC simulation performance by exploiting dynamic routing delay prediction

Raising the abstraction level or parallel execution are two possible solutions in order to cope with extremely long runtimes of complex Multi-Processor System-on-Chip (MPSoC) simulations. Within previous works, a SystemC/TLM based modeling methodology targeting accurate simulation of NoC-based MPSoCs bas been proposed that benefits from both. Communication is abstracted into transactions. This enables extraction of parallelism through temporal decoupling for increasing efficiency of parallel simulation if a loss of accuracy is acceptable. This work extends previous works by a dynamic prediction mechanism that allows adapting the degree of temporal decoupling during runtime and thus prevents any loss of accuracy. The method is based on local time quanta that exist once for every module connection. Delay annotations within modules are exploited for predicting communication delays between modules. Based on these predictions, local time quanta are dynamically adjusted. The approach is evaluated by means of a realistic MPSoC model. Measurements have been performed on different host platforms. Results demonstrate that the method can significantly contribute to acceleration of parallel and sequential simulation.