A programmable FPGA-based cryptoprocessor for bilinear pairings over F2m

Bilinear pairings over elliptic curves are an emerging research field in cryptography. First cryptographic protocols based on bilinear pairings were proposed by the year 2000 and currently they are not standardized yet. The computation of bilinear pairings relies on arithmetic over finite fields. In the literature, several works have focused in the design of custom hardware architectures for efficient implementation of this arithmetic, but in a non-standardized environment a flexible design is prefered in order to support changes in the specifications. This paper presents the design and implementation of a novel programmable cryptoprocessor for computing bilinear pairings over binary fields in FPGA, which is able to support different algorithms and corresponding parameters as the elliptic curve, the tower field and the distortion map. The results show that high flexibility is achieved by the proposed cryptoprocessor at a competitive timing and area usage, when it is compared to custom designs for pairings defined over singular/supersingular elliptic curves at a 128-bit security level.