Title :
Fluorinated HfO2 gate dielectrics engineering for CMOS by pre- and post-CF4 plasma passivation
Author :
Wu, Woei-Cherng ; Lai, Chao-Sung ; Lee, Shih-Ching ; Ma, Ming-Wen ; Chao, Tien-Sheng ; Wang, Jer-Chyi ; Hsu, Chih-Wei ; Chou, Pai-Chi ; Chen, Jian-Hao ; Kao, Kuo-Hsing ; Lo, Wen-Cheng ; Lu, Tsung-Yi ; Tay, Li-Lin ; Rowell, Nelson
Author_Institution :
Dept. of Electron. Eng., Chang Gung Univ., Taoyuan
Abstract :
In this paper, we demonstrate TaN/fluorinated HfO2 CMOS devices, focusing on symmetry and asymmetry fluorine incorporation at top or bottom HfO2 interfaces. 16% permittivity enhancement, 65% and 91% mobility increases for electron and hole, respectively, under high electric field was achieved. Reliability of n- and p-MOSFET was improved 3 orders and 8% for GIDL and hot carrier immunity, respectively. A physical model of shallow and deep trapping level affected by fluorine was proposed to explain the NBTI and PBTI improvements.
Keywords :
CMOS integrated circuits; MOSFET; hafnium compounds; high-k dielectric thin films; passivation; plasma materials processing; semiconductor device models; semiconductor device reliability; tantalum compounds; thermal stability; CF4; CMOS device; GIDL; NBTI; PBTI; TaN-HfO2; fluorinated gate dielectric; gate induced drain leakage; negative bias temperature instability; p-MOSFET; plasma passivation; positive bias temperature instability; post-treated high-k thin film; Atomic layer deposition; Dielectric thin films; Hafnium oxide; Materials science and technology; Nuclear and plasma sciences; Plasma applications; Plasma devices; Plasma materials processing; Semiconductor films; Sputtering;
Conference_Titel :
Electron Devices Meeting, 2008. IEDM 2008. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-2377-4
Electronic_ISBN :
8164-2284
DOI :
10.1109/IEDM.2008.4796706
