A low-power self-biased neural amplifier for implantable EEG recording system ICs

This paper presents a low-power and self-biased neural amplifier for implantable EEG recording system ICs with a high-density interface. To achieve low-power consumption, small die-area, high gain, and high CMRR, a fully differential Chappell OTA is employed along with a capacitive feedback loop. The amplifier operating at ±1.2V has a gain of 65.6dB and consumes a power of 1.7μW. The bandwidth extends from a low-frequency cutoff of below 1 Hz to a high-frequency cutoff of 300Hz which is suitable for EEG signals. This proposed amplifier has an input-referred noise of 9.76μV_RMS and THD of 1.86% with respect to 1mV_PP input at 100Hz. This low-power self-biased neural amplifier occupies an active die-area of 0.244mm² and is under fabrication in 0.35μm CMOS 4M2P Process.