Strain mapping technique for performance improvement of strained MOSFETs with scanning transmission electron microscopy

Author

Nakanishi, N. ; Kudo, S. ; Kawakami, M. ; Hayashi, T. ; Oda, H. ; Uchida, T. ; Miyagawa, Y. ; Asai, K. ; Ohnishi, K. ; Hattori, N. ; Hirose, Y. ; Koyama, T. ; Asayama, K. ; Murakami, E.

Author_Institution

Production & Technol. Unit, Renesas Technol. Corp., Itami

fYear

2008

fDate

15-17 Dec. 2008

Firstpage

1

Lastpage

4

Abstract

A new approach of strain mapping is proposed with scanning transmission electron microscopy and applied to strained MOSFETs for the first time. This technique is extended to quantitative measurement with sub-nano meter spatial resolution combining with nano-beam diffraction. As a result, two-dimensional strain mapping with sub-nano meter spatial resolution is obtained and actual strain at inversion layer was determined using experimental methods without simulation. This technique will become a powerful means of improving the performance and optimizing stress design for strained MOSFETs of 45 nm node and beyond.

Keywords

MOSFET; scanning electron microscopy; 2D strain mapping; inversion layer; metal-oxide-semiconductor field effect transistors; nano-beam diffraction; scanning transmission electron microscopy; size 45 nm; strained MOSFET; stress design; sub-nano meter spatial resolution; Capacitive sensors; Detectors; Diffraction; Electron beams; MOSFETs; Scanning electron microscopy; Scattering; Spatial resolution; Strain measurement; Transmission electron microscopy;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2008. IEDM 2008. IEEE International

Conference_Location

San Francisco, CA

ISSN

8164-2284

Print_ISBN

978-1-4244-2377-4

Electronic_ISBN

8164-2284

Type

conf

DOI

10.1109/IEDM.2008.4796717

Filename

4796717