DocumentCode :
2930156
Title :
Towards a Configurable Many-core Accelerator for FPGA-based embedded systems
Author :
Ramirez, M. ; Daneshtalab, Masoud ; Liljeberg, Pasi ; Plosila, Juha
Author_Institution :
Dept. of Inf. Technol., Univ. of Turku, Turku, Finland
fYear :
2013
fDate :
10-12 July 2013
Firstpage :
1
Lastpage :
4
Abstract :
Hardware accelerators release the general purpose processor of a system from very compute-demanding tasks. This work presents a Configurable Many-core Accelerator for FPGA-based systems, named CoMA. Its architecture combines an array of processing cores interconnected by an NoC, with an I/O interface based on the AXI protocol. CoMA provides the designer with a system abstraction layer that facilitates task partitioning and peripheral access. The implementation of the I/O interface was verified through simulation, and synthesized for an FPGA.
Keywords :
electronic engineering computing; embedded systems; field programmable gate arrays; network-on-chip; AXI protocol; CoMA; FPGA; I/O interface; NoC; configurable many-core accelerator; embedded system; hardware accelerator; peripheral access; system abstraction layer; task partitioning; Computer architecture; Embedded systems; Field programmable gate arrays; Protocols; Random access memory; Synchronization; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013 8th International Workshop on
Conference_Location :
Darmstadt
Print_ISBN :
978-1-4673-6180-4
Type :
conf
DOI :
10.1109/ReCoSoC.2013.6581548
Filename :
6581548
Link To Document :
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