Through-silicon via and die stacking technologies for microsystems-integration

Author

Beyne, Eric ; De Moor, Piet ; Ruythooren, Wouter ; Labie, Riet ; Jourdain, Anne ; Tilmans, Harrie ; Tezcan, Deniz Sabuncuoglu ; Soussan, Philippe ; Swinnen, Bart ; Cartuyvels, Rudi

Author_Institution

IMEC, Leuven

fYear

2008

fDate

15-17 Dec. 2008

Firstpage

1

Lastpage

4

Abstract

The highest integration density of microsystems can be obtained using a 3D-stacking approach, where each layer of the stack is realized using a different technology, which may include sensors, imagers, rf and MEMS technologies. A key challenge is however to perform such stacking in a cost-effective manner. In this paper, a novel 3D TSV and 3D stacking technologies will be presented. Application examples are MEMS packaging and heterogeneous integration of imaging devices.

Keywords

electronics packaging; interconnections; micromechanical devices; 3D stacking technologies; MEMS packaging; die stacking technologies; imaging devices; microsystems-integration; through-silicon via; Bonding processes; Microelectromechanical devices; Micromechanical devices; Packaging; Soldering; Space technology; Stacking; Through-silicon vias; Wafer bonding; Wafer scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2008. IEDM 2008. IEEE International

Conference_Location

San Francisco, CA

ISSN

8164-2284

Print_ISBN

978-1-4244-2377-4

Electronic_ISBN

8164-2284

Type

conf

DOI

10.1109/IEDM.2008.4796734

Filename

4796734