An FPGA-based ATE extension module for low-cost multi-GHz memory test

Author

Keezer, D.C. ; Chen, T.H. ; Moon, T. ; Stonecypher, D.T. ; Chatterjee, A. ; Choi, H.W. ; Kim, S.Y. ; Yoo, H.

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

fYear

2015

fDate

25-29 May 2015

Firstpage

1

Lastpage

6

Abstract

This paper describes an ATE extension module that enables a low-cost test system to be applied to advanced (multi-GHz) memories. The target application is for testing memories with data rates above 3.2Gbps. The test module uses state-of-the-art FPGAs for economical autonomous pattern synthesis and comparison under the high-level supervision of a low-cost “host” test platform (ATE). The FPGA logic capabilities are complemented by custom 4-channel “pin electronics” (PE) modules with I/O performance comparable to advanced ATE. The PE modules provide input/output/bidirectional signal conditioning, including amplitude, format, timing, and pre-emphasis, and a “shadow sampler.”

Keywords

automatic test equipment; field programmable gate arrays; integrated circuit testing; FPGA logic capability; FPGA-based ATE extension module; I/O performance; advanced multiGHz memory; custom 4-channel pin electronics modules; economical autonomous pattern synthesis; input-output-bidirectional signal conditioning; low-cost multiGHz memory test; Connectors; Delays; Field programmable gate arrays; Jitter; Phasor measurement units; Receivers; ATE; FPGA; MemoryTest; Multi-GHz;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium (ETS), 2015 20th IEEE European

Conference_Location

Cluj-Napoca

Type

conf

DOI

10.1109/ETS.2015.7138756

Filename

7138756