Title :
A 300-mm wafer-level three-dimensional integration scheme using tungsten through-silicon via and hybrid Cu-adhesive bonding
Author :
Liu, F. ; Yu, R.R. ; Young, A.M. ; Doyle, J.P. ; Wang, X. ; Shi, L. ; Chen, K.N. ; Li, X. ; Dipaola, D.A. ; Brown, D. ; Ryan, C.T. ; Hagan, J.A. ; Wong, K.H. ; Lu, M. ; Gu, X. ; Klymko, N.R. ; Perfecto, E.D. ; Merryman, A.G. ; Kelly, K.A. ; Purushothaman,
Author_Institution :
IBM T. J. Watson Res. Center, Yorktown Heights, NY
Abstract :
A 300-mm wafer-level three-dimensional integration (3DI) process using tungsten (W) through-silicon vias (TSVs) and hybrid Cu/adhesive wafer bonding is demonstrated. The W TSVs have fine pitch (5 mum), small critical dimension (1.5 mum), and high aspect ratio (17:1). A hybrid Cu/adhesive bonding approach, also called transfer-join (TJ) method, is used to interconnect the TSVs to a Cu BEOL in a bottom wafer. The process also features thinning of the top wafer to 20 mum and a Cu backside BEOL on the thinned top wafer. The electrical and physical properties of the TSVs and bonded interconnect are presented and show RLC values that satisfy both the power delivery and high-speed signaling requirements for high-performance 3D systems.
Keywords :
adhesive bonding; copper; elemental semiconductors; integrated circuit interconnections; silicon; tungsten; wafer bonding; wafer level packaging; Cu; Si; W; bottom wafer; critical dimension; fine pitch; high-performance 3D systems; high-speed signaling requirements; hybrid adhesive bonding; power delivery requirements; size 300 nm; tungsten through-silicon via; wafer-level three-dimensional integration; Etching; Hybrid junctions; Physics computing; Plasma measurements; Power system interconnection; Research and development; Strain measurement; Through-silicon vias; Tungsten; Wafer bonding;
Conference_Titel :
Electron Devices Meeting, 2008. IEDM 2008. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-2377-4
Electronic_ISBN :
8164-2284
DOI :
10.1109/IEDM.2008.4796762
