DocumentCode
293137
Title
Pulse-stream circuits for on-chip learning in analogue VLSI neural networks
Author
Woodburn, Robin ; Reekie, H. Martin ; Murray, Alan F.
Author_Institution
Dept. of Electr. Eng., Edinburgh Univ., UK
Volume
4
fYear
1994
fDate
30 May-2 Jun 1994
Firstpage
103
Abstract
We explain the advantages of the Virtual-Targets algorithm for learning in a VLSI Multilayer Perceptron, outline the design issues, and describe fabricated circuits that implement the main algorithmic functions. The test-chip described is a precursor to a larger device incorporating full on-chip learning
Keywords
VLSI; analogue processing circuits; learning (artificial intelligence); multilayer perceptrons; neural chips; pulse circuits; algorithmic functions; analogue VLSI neural networks; multilayer perceptron; on-chip learning; pulse-stream circuits; virtual-targets algorithm; Algorithm design and analysis; Buildings; Intelligent networks; Intelligent robots; Multi-layer neural network; Network-on-a-chip; Neural networks; Neurons; Pulse circuits; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location
London
Print_ISBN
0-7803-1915-X
Type
conf
DOI
10.1109/ISCAS.1994.409208
Filename
409208
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