DocumentCode
2931482
Title
A high-performance hardware implementation of the H.264 simplified 8×8 transformation and quantization [video coding]
Author
Amer, Ihab ; Badawy, Wael ; Jullien, Graham
Author_Institution
Adv. Technol. Inf. Process. Syst., Calgary, Alta., Canada
Volume
2
fYear
2005
fDate
18-23 March 2005
Abstract
The recently approved digital video standard known as H.264 promises to be an excellent video format for use with a large range of applications. Real-time encoding/decoding is a main requirement for adoption of the standard to take place in the consumer marketplace. Transformation and quantization in H.264 are relatively less complex than their correspondences in other video standards. Nevertheless, for real-time operation, a speedup is required for such processes. Especially after the recent proposal to use an 8×8 integer approximation of discrete cosine transform (DCT) to give significant compression performance at standard definition (SD) and high definition (HD) resolutions. This paper discusses a high-performance hardware implementation of the H.264 simplified 8×8 transformation and quantization. The results show that the architecture satisfies the real-time constraints required by different digital video applications.
Keywords
discrete cosine transforms; image resolution; quantisation (signal); video coding; DCT integer approximation; H.264 hardware implementation; digital video standard; high definition resolution; quantization; real-time encoding/decoding; standard definition resolution; Decoding; Discrete cosine transforms; Encoding; Hardware; Information processing; Proposals; Quantization; Robustness; Video coding; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 2005. Proceedings. (ICASSP '05). IEEE International Conference on
ISSN
1520-6149
Print_ISBN
0-7803-8874-7
Type
conf
DOI
10.1109/ICASSP.2005.1415610
Filename
1415610
Link To Document