DocumentCode :
2931762
Title :
30 nm E-mode InAs PHEMTs for THz and future logic applications
Author :
Kim, Dae-Hyun ; del Alamo, Jesús A.
Author_Institution :
Massachusetts Inst. of Technol. (MIT), Cambridge, MA
fYear :
2008
fDate :
15-17 Dec. 2008
Firstpage :
1
Lastpage :
4
Abstract :
We have demonstrated 30 nm E-mode InAs PHEMTs with outstanding Tera-Hz (THz) and logic performance. The devices feature a Pt gate sinking process to effectively thin down the In0.52Al0.48As barrier layer. Fabricated devices show excellent Lg scalability down to 30 nm with record fT in E-mode devices, and record combination of fT and fmax in any transistor technology. In particular, 30 nm devices exhibit VT = 80 mV, gm,max = 1.83 mS/mum, S = 73 mV/dec, DIBL = 85 mV/V, fT = 601 and fmax = 609 GHz at VDS = 0.5 V. We have also estimated a source injection velocity of vinj = 2.5 times 107 cm/s at VDS = 0.5 V, about a factor of two higher than state-of-the-art Si MOSFETs These encouraging results stem from the outstanding transport properties of InAs as a channel material coupled with well-tempered design features that improve short-channel effects through insulator thickness scaling with buried Pt-gate.
Keywords :
III-V semiconductors; aluminium compounds; high electron mobility transistors; indium compounds; platinum; semiconductor-metal boundaries; E-mode PHEMT; InAs-Pt-In0.52Al0.48As; gate sinking process; record combination; size 30 nm; source injection velocity; transport properties; CMOS logic circuits; Etching; Indium compounds; Insulation; Logic devices; MOSFETs; PHEMTs; Scalability; State estimation; Tin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2008. IEDM 2008. IEEE International
Conference_Location :
San Francisco, CA
ISSN :
8164-2284
Print_ISBN :
978-1-4244-2377-4
Electronic_ISBN :
8164-2284
Type :
conf
DOI :
10.1109/IEDM.2008.4796796
Filename :
4796796
Link To Document :
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