High-performance 40nm gate length InSb p-channel compressively strained quantum well field effect transistors for low-power (VCC=0.5V) logic applications

Author

Radosavljevic, M. ; Ashley, T. ; Andreev, A. ; Coomber, S.D. ; Dewey, G. ; Emeny, M.T. ; Fearn, M. ; Hayes, D.G. ; Hilton, K.P. ; Hudait, M.K. ; Jefferies, R. ; Martin, T. ; Pillarisetty, R. ; Rachmady, W. ; Rakshit, T. ; Smith, S.J. ; Uren, M.J. ; Wallis

Author_Institution

Technol. & Manuf. Group, Intel Corp., Hillsboro, OR

fYear

2008

fDate

15-17 Dec. 2008

Firstpage

1

Lastpage

4

Abstract

This paper describes for the first time, a high-speed and low-power III-V p-channel QWFET using a compressively strained InSb QW structure. The InSb p-channel QW device structure, grown using solid source MBE, demonstrates a high hole mobility of 1,230 cm²/V-s. The shortest 40 nm gate length (L_G) transistors achieve peak transconductance (G_m) of 510 muS/mum and cut-off frequency (f_T) of 140 GHz at supply voltage of 0.5V. These represent the highest G_m and fT ever reported for III-V p-channel FETs. In addition, effective hole velocity of this device has been measured and compared to that of the standard strained Si p-channel MOSFET.

Keywords

III-V semiconductors; antimony compounds; field effect transistors; indium compounds; quantum well devices; InSb; InSb P-channel; frequency 140 GHz; low-power III-V p-channel QWFET; low-power logic applications; strained quantum well field effect transistors; voltage 0.5 V; Capacitive sensors; Doping; FETs; Gallium arsenide; III-V semiconductor materials; Image coding; Logic; MOSFETs; Transconductance; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2008. IEDM 2008. IEEE International

Conference_Location

San Francisco, CA

ISSN

8164-2284

Print_ISBN

978-1-4244-2377-4

Electronic_ISBN

8164-2284

Type

conf

DOI

10.1109/IEDM.2008.4796798

Filename

4796798