A case study of mixed-signal integrated circuit testing: an application of current testing using the upper limit and the lower limit

Author

Miura, Yukiya ; Naito, Sachio ; Kinoshita, Kozo

Author_Institution

Dept. of Electron. & Inf. Eng., Tokyo Metropolitan Univ., Japan

Volume

5

fYear

1994

fDate

30 May-2 Jun 1994

Firstpage

77

Abstract

Many recent ASICs include both analog and digital circuits, called mixed-signal integral circuits, to realize required functions on one chip. The comparator circuit is a principal element in the mixed-signal integrated circuit. In this paper we discuss a method for testing CMOS comparators. The method is current testing using both the upper limit and the lower limit. Bridging faults and break faults are assumed on the circuit layout and are analyzed by a circuit simulator. We examine the efficiency of fault detection by current testing. The result of the test shows that the proposed testing method has the highly fault coverage more than 94 percent

Keywords

CMOS integrated circuits; circuit analysis computing; comparators (circuits); fault diagnosis; integrated circuit testing; mixed analogue-digital integrated circuits; ASICs; CMOS comparator; break faults; bridging faults; circuit layout; circuit simulator; current testing; fault coverage; fault detection; lower limit; mixed-signal integrated circuit testing; upper limit; Circuit faults; Circuit simulation; Circuit testing; Computer aided software engineering; Digital circuits; Electrical fault detection; Electronic equipment testing; Integrated circuit testing; Logic testing; Mixed analog digital integrated circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on

Conference_Location

London

Print_ISBN

0-7803-1915-X

Type

conf

DOI

10.1109/ISCAS.1994.409304

Filename

409304