• DocumentCode
    2932501
  • Title

    Enhancing SRAM cell performance by using independent double-gate FinFET

  • Author

    Endo, Kazuhiko ; O´Uchi, Shin-Ichi ; Ishikawa, Yuki ; Liu, Yongxun ; Matsukawa, Takashi ; Sakamoto, Kunihiro ; Tsukada, Junichi ; Ishii, Kenichi ; Yamauchi, Hiromi ; Suzuki, Eiichi ; Masahara, Meishoku

  • Author_Institution
    Nanoelectron. Res. Inst., Nat. Inst. of Adv. Ind. Sci. & Technol., Tsukuba
  • fYear
    2008
  • fDate
    15-17 Dec. 2008
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    SRAM cells with Vth-controllable independent double-gate (IDG) FinFETs have been successfully fabricated. The performance of the fabricated SRAM cell with various circuit topologies has been investigated comprehensively. Both a reduction of leakage current and an enhancement of read and write noise margins have been successfully demonstrated by introducing the IDG FinFETs into the SRAM cells.
  • Keywords
    MOS memory circuits; MOSFET; SRAM chips; leakage currents; SRAM cell; double-gate FinFET; leakage current; write noise margins; Circuit noise; Circuit topology; FinFETs; Leakage current; MOSFETs; Nanoelectronics; Noise reduction; Random access memory; Textile industry; Variable structure systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 2008. IEDM 2008. IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    8164-2284
  • Print_ISBN
    978-1-4244-2377-4
  • Electronic_ISBN
    8164-2284
  • Type

    conf

  • DOI
    10.1109/IEDM.2008.4796833
  • Filename
    4796833
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2932501