A transform coding chip set for image compression

Author

Shah, Imran ; Akiwumi-Assani, Olu ; Johnson, Brian

Author_Institution

North American Philips Corp., Briarcliff Manor, NY, USA

fYear

1990

fDate

3-6 Apr 1990

Firstpage

961

Abstract

Two application-specific integrated circuits (ASICs) were designed to perform hierarchical transformation (S-transform processor) and Lempel-Ziv entropy coding (data compressor/decompressor). The chips can be used independently or together as a transform coding chip set for image compression. The algorithms and chip architectures of the transform codec (S-transform processor) and the entropy codec (data compressor/decompressor) are described

Keywords

application specific integrated circuits; codecs; computerised picture processing; data compression; decoding; digital signal processing chips; encoding; transforms; ASIC; Lempel-Ziv entropy coding; S-transform processor; application-specific integrated circuits; chip architectures; data compressor/decompressor; entropy codec; hierarchical transformation; image compression; transform codec; transform coding chip set; Application specific integrated circuits; Codecs; Decorrelation; Entropy coding; Equations; Image coding; Image resolution; Image storage; Pixel; Spatial resolution; Transform coding;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 1990. ICASSP-90., 1990 International Conference on

Conference_Location

Albuquerque, NM

ISSN

1520-6149

Type

conf

DOI

10.1109/ICASSP.1990.116026

Filename

116026