Aggressive design of millisecond annealing junctions for near-scaling-limit bulk CMOS using raised source/drain extensions

An aggressive junction design concept is proposed for further scaling of bulk CMOS featuring selective epi-growth raised source/drain extentions (RSDext) in conjunction with high temperature millisecond annealing (MSA) process. The junction design window enlarged by introducing the RSDext enables us to perform elaborate control of slight ldquointentionalrdquo diffusion onto the MSA process rather than aiming complete--diffusion-less junctions. Such the ldquoeffectiverdquo ultra-shallow junctions under the raised S/D-extentions are demonstrated, in this paper, to exhibit both lower parasitic resistance and lower junction leakage while maintaining superior short-channel-effect suppression, i.e. V_TH roll-off characteristics, and any reliability issues.