90nm WAl2O3TiWCu 1T1R CBRAM cell showing low-power, fast and disturb-free operation

Author

Belmonte, A. ; Kim, Wonhee ; Chan, Britney ; Heylen, Nancy ; Fantini, Andrea ; Houssa, M. ; Jurczak, Malgorzata ; Goux, L.

Author_Institution

IMEC, Leuven, Belgium

fYear

2013

fDate

26-29 May 2013

Firstpage

26

Lastpage

29

Abstract

In this paper we demonstrate excellent memory performances of a 90nm CMOS-friendly WAl₂O₃TiWCu CBRAM cell integrated in a 1T1R configuration and withstanding the back-end of line thermal budget of 400°C. The cell exhibits low-power and highly controlled set and reset operations, allowing reversible multilevel programming controlled by both the set current and the reset voltage. Low-voltage (<;3V) operation is obtained down to 10ns-long write pulse both for set and reset, and allowing >10⁶ write endurance with a 2-decade memory window. State stability is assessed up to 125°C. Moreover, due to low slope of the voltage-log(time) relationship the cell also shows excellent voltage-disturb immunity assessed up to +/-0.5V and extrapolated to 10 years.

Keywords

CMOS memory circuits; alumina; copper; random-access storage; stability; titanium compounds; tungsten; 1T1R CBRAM cell; 2-decade memory window; CMOS; W-Al₂O₃-TiW-Cu; disturb-free operation; line thermal budget; low-voltage operation; reversible multilevel programming; size 90 nm; state stability; temperature 400 degC; time 10 ns; voltage-disturb immunity; voltage-log relationship; Aluminum oxide; Programming; Random access memory; Resistance; Switches; Thermal stability; CBRAM; Conductive-bridging; ECM; high performance memory; low-power memory; memory disturb;

fLanguage

English

Publisher

ieee

Conference_Titel

Memory Workshop (IMW), 2013 5th IEEE International

Conference_Location

Monterey, CA

Print_ISBN

978-1-4673-6168-2

Type

conf

DOI

10.1109/IMW.2013.6582089

Filename

6582089