A novel multilayer Inter-Gate Dielectric enabling up to 18V Program / Erase window for planar NAND flash

Author

Breuil, L. ; Lisoni, J. ; Blomme, P. ; Van den bosch, G. ; Van Houdt, J.

Author_Institution

Imec, Leuven, Belgium

fYear

2013

fDate

26-29 May 2013

Firstpage

68

Lastpage

71

Abstract

The required transition from Control Gate wrap-around to planar structure for NAND flash scaling below 20 nm node causes important loss of coupling factor. In order to recover the Program / Erase window, a Hybrid Floating Gate featuring a high work function metal on top of Si, together with a high-k Inter-Gate Dielectric are needed. In this paper, we develop a multilayer Inter-Gate Dielectric based on HfAlO and Al₂O₃, combined with a Si/TiN Hybrid Floating Gate. By optimizing the stack structure, a window as large as ~18V could be obtained.

Keywords

aluminium compounds; field effect memory circuits; flash memories; hafnium compounds; high-k dielectric thin films; silicon; titanium compounds; Al₂O₃; HfAlO; Si-TiN; coupling factor; erase window; high work function metal; high-k intergate dielectric; hybrid floating gate; multilayer intergate dielectric; planar NAND flash; planar structure; program window; stack structure; voltage 18 V; Aluminum oxide; Dielectrics; Flash memories; High K dielectric materials; Programming; Silicon; Tin; High-k dielectrics; Hybrid floating gate; Inter-gate dielectic; NAND Flash;

fLanguage

English

Publisher

ieee

Conference_Titel

Memory Workshop (IMW), 2013 5th IEEE International

Conference_Location

Monterey, CA

Print_ISBN

978-1-4673-6168-2

Type

conf

DOI

10.1109/IMW.2013.6582100

Filename

6582100