DocumentCode :
2933805
Title :
Test set embedding based on width compression for mixed-mode BIST
Author :
Chakrabarty, Krishnendu ; Das, Sunil R.
Author_Institution :
Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
Volume :
3
fYear :
1999
fDate :
1999
Firstpage :
1778
Abstract :
We present a new test generator circuit (TGC) for mixed-mode built-in self-test (BIST) that embeds a precomputed deterministic test set TD in a longer sequence. The design method employs width compression based on the property of d-compatibles. To demonstrate the feasibility of the TGC design method, we present experimental data for single stuck-at test sets for the ISCAS 85 circuits and full-scan versions of the ISCAS 89 benchmark circuits. We also achieve significant improvement over another recently-proposed mixed-mode TGC design scheme for BIST
Keywords :
built-in self test; integrated circuit testing; mixed analogue-digital integrated circuits; ISCAS 85 circuit; ISCAS 89 circuit; built-in self-test; d-compatible; deterministic test set; mixed-mode IC; stuck-at fault; test generator circuit design; test set embedding; width compression; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Design methodology; Embedded computing; Encoding; Flip-flops; Logic testing; Random sequences;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Instrumentation and Measurement Technology Conference, 1999. IMTC/99. Proceedings of the 16th IEEE
Conference_Location :
Venice
ISSN :
1091-5281
Print_ISBN :
0-7803-5276-9
Type :
conf
DOI :
10.1109/IMTC.1999.776127
Filename :
776127
Link To Document :
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