Deep submicron on-chip crosstalk [and ANN prediction]

Author

Yang, Zemo ; Mourad, Samiha

Author_Institution

S3 Inc., Santa Clara, CA, USA

Volume

3

fYear

1999

fDate

1999

Firstpage

1788

Abstract

In this paper, we study the effect of crosstalk using three deep submicron technologies. We start the experiment by comparing the different technologies. Then we concentrate on 0.18 μm technology to examine the effect of different parameters on the crosstalk voltage peak and circuit timing. The parameters of interest are the size of the driving and load device and the length of the coupled line. The results confirmed that finer technologies cause higher impact. The magnitude of crosstalk in 0.18 μm may be high enough to violate noise margin. Preliminary layout guidelines are deduced. To facilitate applying them to CAD tools, an ANN was used to predict crosstalk given data on the driver, the load and the length of the interconnect

Keywords

SPICE; circuit layout CAD; crosstalk; equivalent circuits; integrated circuit interconnections; integrated circuit layout; integrated circuit modelling; neural nets; 0.18 micron; ANN network; CAD tools; HSPICE; IC design; circuit timing; coupled line length; crosstalk voltage peak; deep submicron on-chip crosstalk; different parameters effect; driving and load device size; equivalent circuit; interconnect length; layout guidelines; modelling; noise margin; signal interference; Couplings; Crosstalk; Driver circuits; Impedance; Integrated circuit interconnections; Propagation losses; Routing; Timing; Transmission lines; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 1999. IMTC/99. Proceedings of the 16th IEEE

Conference_Location

Venice

ISSN

1091-5281

Print_ISBN

0-7803-5276-9

Type

conf

DOI

10.1109/IMTC.1999.776129

Filename

776129