Title :
A 136 cycles/MB, luma-chroma parallelized H.264/AVC deblocking filter for QFHD applications
Author :
Zhou, Jinjia ; Zhou, Dajiang ; Zhang, Hang ; Hong, Yu ; Liu, Peilin ; Goto, Satoshi
Author_Institution :
Grad. Sch. of Inf., Production & Syst., Waseda Univ., Fukuoka, Japan
fDate :
June 28 2009-July 3 2009
Abstract :
In this paper, we present a high-throughput deblocking filter architecture for H.264/AVC in QFHD applications. In order to enhance the parallelism of filtering without notably increasing the area, we propose to parallelize the processing of luminance and chrominance samples, instead of simultaneously filtering two edges of a same component. Although the edge filter and transpose cost of the proposed architecture is a little larger than that of the single-filter solution, control logic is saved by applying an identical processing schedule to both the luminance and chrominance samples. Meanwhile, total SRAM size by bit is kept unchanged when the architecture is parallelized. As a result, throughput of this work is advanced by 50% (or processing time reduced by 33%), to be 136 cycles/MB, while area cost (17.9 k gates logic and 8 k bits SRAM) is kept comparable to the state-of-the-art works.
Keywords :
filtering theory; video coding; QFHD application; SRAM; chrominance; control logic; edge filter; high-throughput deblocking filter architecture; luma-chroma parallelized H.264/AVC deblocking filter; luminance; single-filter solution; Automatic voltage control; Clocks; Costs; Information filtering; Information filters; Large scale integration; Logic gates; Random access memory; Throughput; Video codecs; H.264/AVC; QFHD; deblocking filter; parallelism;
Conference_Titel :
Multimedia and Expo, 2009. ICME 2009. IEEE International Conference on
Conference_Location :
New York, NY
Print_ISBN :
978-1-4244-4290-4
Electronic_ISBN :
1945-7871
DOI :
10.1109/ICME.2009.5202699