ATM circuit emulation-a comparison of recent techniques

The authors compare recently developed timing recovery methods for circuit emulation in broadband packet networks. It is generally believed that synchronous methods such as the synchronous frequency encoding technique (SFET) offer faster convergence and simpler implementation than phase-lock techniques that recover source rate from the jittery packet arrival stream. It is shown that this belief does not extend to recently reported phase-lock methods, particularly the time difference of arrival (TDOA) estimator. The authors derive the convergence behavior of the TDOA method and show that it is comparable to SFET. It is also shown that the implementation complexities of the two methods are comparable