DocumentCode :
2934502
Title :
Efficient architectures for operators
Author :
Marwood, W.
Author_Institution :
Commun. Div., Defence Sci. & Technol. Organ., Salisbury, SA, Australia
fYear :
1995
fDate :
23-25 May 1995
Firstpage :
267
Lastpage :
275
Abstract :
The paper discusses the possibility of high performance computing for restricted classes of algorithms. An analysis of signal processing algorithms has identified a number of common operators which can be implemented efficiently with VLSI technology. The integration of these operators into conventional workstation environments provides the potential for orders of magnitude performance improvements for large numbers of algorithms which are used in linear transform and linear algebra applications. A small set of preferred operators is defined and their implementation is discussed. Simulation results are used to predict the expected performance gains for some of the operators when used in a number of typical algorithms
Keywords :
VLSI; linear algebra; signal processing; VLSI technology; common operators; conventional workstation environments; efficient architectures; expected performance gains; high performance computing; linear algebra applications; linear transform; performance improvements; preferred operators; restricted classes; signal processing algorithms; simulation results; Algorithm design and analysis; Computer architecture; High performance computing; Linear algebra; Performance gain; Predictive models; Signal analysis; Signal processing algorithms; Very large scale integration; Workstations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Technology Directions to the Year 2000, 1995. Proceedings.
Conference_Location :
Adelaide, SA
Print_ISBN :
0-8186-7085-1
Type :
conf
DOI :
10.1109/ETD.1995.403464
Filename :
403464
Link To Document :
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