DocumentCode
2934721
Title
Digital Synchronous System for Ultra High-Speed Physical Diagnostic Equipments
Author
Xue, Ying-Dong ; Bai, Yong-Lin ; Li, Yan
Author_Institution
Xi´´an Inst. of Opt. & Precision Mech., Chinese Acad. of Sci., Xi´´an, China
fYear
2010
fDate
19-21 June 2010
Firstpage
1
Lastpage
4
Abstract
A design of the digital synchronous system which is based on FPGA is presented. To reduce the delay of the system logic and enhance the working frequency, the timing constraints have been analyzed. We investigate the influences of the delay of data output (Tco), the delay of combinational logic circuits (Tdelay), the setup time (Tsetup) and the clock cycle (T) on the working frequency, and adopt the method of combinational logic splitting to reduce the LUT cascade connection. As a result, not only is stably running the system at 200 MHz clock realized, but also completely meets the experiment requirements. This system provides a reliable guarantee for controlling on ultra high-speed physical diagnostic system.
Keywords
field programmable gate arrays; optical logic; FPGA; LUT cascade connection; combinational logic circuits delay; combinational logic splitting; data output delay; digital synchronous system; frequency 200 MHz; system logic delay; ultra high-speed physical diagnostic equipments; ultra high-speed physical diagnostic system; Clocks; Combinational circuits; Control systems; Delay effects; Delay systems; Field programmable gate arrays; Frequency; Logic; Table lookup; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Photonics and Optoelectronic (SOPO), 2010 Symposium on
Conference_Location
Chengdu
Print_ISBN
978-1-4244-4963-7
Electronic_ISBN
978-1-4244-4964-4
Type
conf
DOI
10.1109/SOPO.2010.5503997
Filename
5503997
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