DocumentCode
2935866
Title
Self-testable video controllers
Author
Sebaa, Lahouari ; Ladick, Andrew ; Lofgren, Karl ; Cater, Dennis
Author_Institution
Western Digital Corp., Irvine, CA, USA
fYear
1994
fDate
27-29 Sep 1994
Firstpage
542
Lastpage
546
Abstract
This paper presents a cost effective scheme for self-testing video graphics controller chips and boards. With the proper placement of a reconfigurable linear feedback shift register structure, the on-board video memory, the video data-path, and the RAM-DAC blocks can be self-tested. This self-test mode can be integrated as a RUNBIST option in the IEEE boundary scan standards
Keywords
add-on boards; automatic testing; built-in self test; computer graphic equipment; digital signal processing chips; integrated circuit testing; printed circuit testing; shift registers; IEEE boundary scan standards; RAM-DAC blocks; RUNBIST option; onboard video memory; reconfigurable linear feedback shift register; self-test mode; self-testable video controllers; video data-path; video graphics boards; video graphics controller chips; Built-in self-test; Circuit testing; Costs; Cyclic redundancy check; Graphics; Hardware; Linear feedback shift registers; Random access memory; Read-write memory; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
WESCON/94. Idea/Microelectronics. Conference Record
Conference_Location
Anaheim , CA
ISSN
1095-791X
Print_ISBN
0-7803-9992-7
Type
conf
DOI
10.1109/WESCON.1994.403540
Filename
403540
Link To Document