DocumentCode
2936463
Title
Coarse-grained reconfigurable image stream processor architecture for embedded image/video processing and analysis
Author
Chien, Shao-Yi ; Chen, Tsung-Huang ; Chen, Jason C. ; Cheng, Tung-Yuan ; Chan, Wei-Kai
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
2009
fDate
June 28 2009-July 3 2009
Firstpage
1578
Lastpage
1579
Abstract
To achieve low-cost low-power high-performance embedded image/ video processing and analysis, in this paper, a coarse-grained reconfigurable image stream processor (CRISP) architecture is proposed. With the reconfigurable datapath and interconnection optimized for image/video processing, it can be viewed as an application-specific reconfigurable device for image/video processing, and several design examples are shown to demonstrate the high efficiency of CRISP architecture.
Keywords
digital signal processing chips; reconfigurable architectures; video signal processing; video streaming; CRISP architecture; application-specific reconfigurable device; coarse-grained reconfigurable image stream processor architecture; digital signal processor; embedded image processing; reconfigurable datapath; video processing; Bandwidth; Chromium; Computer architecture; Costs; Engines; Image analysis; Image processing; Image sensors; Signal processing algorithms; Streaming media; CRISP; coarse-grained; reconfigurable; stream processor;
fLanguage
English
Publisher
ieee
Conference_Titel
Multimedia and Expo, 2009. ICME 2009. IEEE International Conference on
Conference_Location
New York, NY
ISSN
1945-7871
Print_ISBN
978-1-4244-4290-4
Electronic_ISBN
1945-7871
Type
conf
DOI
10.1109/ICME.2009.5202815
Filename
5202815
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