Title :
Flip chip CPU package technology at Intel: a technology and manufacturing overview
Author :
Shukla, R. ; Murali, V. ; Bhansali, A.
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
CPU evolution in performance/cost continues to drive the packaging technology. The limitations of wire bonded interconnects and traditional C4/Ceramic flip chip have resulted in development of a new paradigm for CPU packaging involving area array solder bump connections to a high density organic multi layer LGA package. This paper describes some of the key reasons behind this transition. It introduces the key aspects of the new assembly process architecture, associated process flows and key yield/reliability issues addressed during the development
Keywords :
flip-chip devices; integrated circuit packaging; microprocessor chips; Intel; area array solder bump connection; assembly; flip-chip CPU package technology; manufacturing; organic multilayer LGA package; process architecture; process flow; reliability; yield; Assembly; Bonding; Components, packaging, and manufacturing technology; Electronic packaging thermal management; Flip chip; Lead; Microprocessors; Semiconductor device packaging; Substrates; Thermal management;
Conference_Titel :
Electronic Components and Technology Conference, 1999. 1999 Proceedings. 49th
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-5231-9
DOI :
10.1109/ECTC.1999.776299
