Performance analysis of queuing algorithms in packet system internal protocol handler

In the packet handler of a ISDN switching system, the design of the inter-processor communication is one of main problem to be solved for achieving a good packet switching performance. We evaluate the performance of the PIPH by experiments on the TDX-10 ISDN packet handler test bed, which consists of three major parts: I/O controller, source simulator, and sink simulator. The performance tests are carried out by four steps in order to measure the maximum inter-processor communication throughput of the packet handler and to find the bottle-necks in the inter-processor communication architecture, and to tune the service discipline and the service parameters for the queuing algorithms in the PIPH