DocumentCode
2937350
Title
A novel double p-well lateral emitter switched thyristor
Author
Qin, Zuxin ; Narayanan, E. M Sankara
Author_Institution
Emerging Technol. Res. Centre, De Monfort Univ., Leicester, UK
fYear
1999
fDate
1999
Firstpage
1047
Lastpage
1050
Abstract
A novel double p-well Lateral Emitter Switched Thyristor (LEST) structure is presented. This structure is highly area-efficient and shows a significantly enhanced on-state performance in comparison to a conventional LEST. Detailed numerical simulations are used to verify the operation and the device performance. The results confirm improvements in the on-state performance and latch-up immunity
Keywords
equivalent circuits; power integrated circuits; semiconductor device models; thyristors; 5 V; area-efficient structure; double p-well LEST structure; enhanced on-state performance; latch-up immunity; lateral emitter switched thyristor; numerical simulations; Anodes; Cathodes; Circuit simulation; Conductivity; Equivalent circuits; Insulated gate bipolar transistors; Low voltage; Numerical simulation; Substrates; Thyristors;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 1999. 1999 Proceedings. 49th
Conference_Location
San Diego, CA
ISSN
0569-5503
Print_ISBN
0-7803-5231-9
Type
conf
DOI
10.1109/ECTC.1999.776316
Filename
776316
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