DocumentCode :
2937519
Title :
A 9.2 mW, 4-8 GHz Resistive Feedback CMOS LNA with 24.4 dB Gain, 2 dB Noise Figure, and 21.5 dBm Output IP3
Author :
Perumana, Bevin G. ; Zhan, Jing-Hong C. ; Taylor, Stewart S. ; Carlton, Brent R. ; Laskar, Joy
Author_Institution :
Intel Corp., Hillsboro, OR
fYear :
2008
fDate :
23-25 Jan. 2008
Firstpage :
34
Lastpage :
37
Abstract :
A 9.2 mW resistive feedback CMOS low-noise amplifier with a 3-dB bandwidth of 3.94 GHz (4.04 -7.98 GHz) is presented. At 5.5 GHz, the fully integrated LNA achieves a measured gain above 24 dB, a noise figure of 2 dB, and an output IP3 of 21.5 dBm. The LNA draws 7.7 mA from the 1.2 V supply and utilizes a single compact low-Q on-chip inductor. The LNA is implemented in a 90-nm CMOS process and occupies a die area of only 0.022 mm2.
Keywords :
CMOS integrated circuits; feedback; low noise amplifiers; CMOS low noise amplifier; feedback amplifiers; resistive feedback; Bandwidth; Capacitors; Circuit noise; Gain; Inductors; Low-noise amplifiers; Narrowband; Noise figure; Output feedback; Radio frequency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems, 2008. SiRF 2008. IEEE Topical Meeting on
Conference_Location :
Orlando, FL
Print_ISBN :
978-1-4244-1855-8
Electronic_ISBN :
978-1-4244-1856-5
Type :
conf
DOI :
10.1109/SMIC.2008.15
Filename :
4446249
Link To Document :
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