Title :
Role of parasitic BJT in the design of DMOSFET
Author :
Pejcinovic, Branimir ; Brech, Helmut ; Persun, Marijan
Author_Institution :
Dept. of Electr. Eng., Portland State Univ., OR, USA
Abstract :
Use of device simulation programs in teaching power semiconductor devices courses is illustrated. A design procedure for DMOSFET is outlined and use of simulation to analyze device behavior is illustrated. It is shown that the parasitic BJT plays a very important role and the device design should try to minimize it from the very beginning. Usefulness of the device simulation in the analysis of the device operation is demonstrated. Some of the common problems in using simulation are given and remedies provided
Keywords :
bipolar transistors; circuit analysis computing; computer aided instruction; digital simulation; educational courses; electronic engineering education; power MOSFET; semiconductor device models; DMOSFET; design procedure; device behavior analysis; diode design; parasitic BJT; power semiconductor device simulation; power semiconductor devices courses; power semiconductor devices teaching; Analytical models; Circuit simulation; Computational modeling; Computer simulation; Design optimization; Education; Integral equations; Poisson equations; Power semiconductor devices; Semiconductor diodes;
Conference_Titel :
Computers in Power Electronics, 1996., IEEE Workshop on
Conference_Location :
Portland, OR
Print_ISBN :
0-7803-3977-0
DOI :
10.1109/CIPE.1996.612347
