RAP: a ring array processor for multilayer perceptron applications

Author

Morgan, N. ; Beck, J. ; Allman, E. ; Beer, J.

Author_Institution

Int. Comput. Sci. Inst., Berkeley, CA, USA

fYear

1990

fDate

3-6 Apr 1990

Firstpage

1005

Abstract

A ring array processor (RAP) designed for fast simulation of artificial neural network algorithms is described. The RAP is a multiprocessor system which is particularly targeted in the training of feedforward networks for the recognition of continuous speech. The overall system consists of several four-processor boards serving together as an array processor for a 68020-based host running a real-time operating system. The prototype design includes 64 Mbytes of dynamic memory (expandable to 256) and 4 Mbytes of fast static RAM distributed between 16 processors on four boards. Theoretical peak performance is 512 MFLOPS, and simulations have indicated a sustained throughput of roughly half of this for algorithms of current interest, including communication overhead of roughly 10-30%. Initial tests with the new hardware have confirmed the major assumptions of the estimates from the simulations

Keywords

digital simulation; multiprocessing systems; neural nets; speech recognition; 4 MByte; 512 MFLOPS; 64 MByte; 68020-based host; artificial neural network algorithms; communication overhead; continuous speech recognition; dynamic memory; feedforward networks; multilayer perceptron applications; multiprocessor system; real-time operating system; ring array processor; simulation; static RAM; training; Algorithm design and analysis; Artificial neural networks; Multilayer perceptrons; Multiprocessing systems; Operating systems; Process design; Prototypes; Real time systems; Speech recognition; Target recognition;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 1990. ICASSP-90., 1990 International Conference on

Conference_Location

Albuquerque, NM

ISSN

1520-6149

Type

conf

DOI

10.1109/ICASSP.1990.116058

Filename

116058