• DocumentCode
    2939124
  • Title

    A reconfigurable system for digital signal processing

  • Author

    Letian, Huang ; Guangjun, Li

  • Author_Institution
    Sch. of Commun. & Inf. Eng., UESTC, Chengdu
  • fYear
    2008
  • fDate
    20-22 July 2008
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Commonality of various algorithms is analyzed based on the research of algorithms commonly used digital signal processing and a reconfigurable cell is proposed. A reconfigurable system with the cells is designed, which is widely used in a variety of digital signal processing. The principle and method of using this system are discussed with the basic algorithms of digital signal processing - multiplication and adder - as example. By means of simulation and implementation, it is found that this system has much higher processing speed and efficiency, compared with other kinds of GM multipliers.
  • Keywords
    digital signal processing chips; GM multipliers; digital signal processing; processing speed; reconfigurable system; Computer architecture; Digital filters; Digital signal processing; Digital systems; Discrete cosine transforms; Fourier transforms; Signal analysis; Signal design; Signal processing; Signal processing algorithms; algorithms; cell; digital signal processing; multiplier; reconfiguration system;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Systems, Signals and Devices, 2008. IEEE SSD 2008. 5th International Multi-Conference on
  • Conference_Location
    Amman
  • Print_ISBN
    978-1-4244-2205-0
  • Electronic_ISBN
    978-1-4244-2206-7
  • Type

    conf

  • DOI
    10.1109/SSD.2008.4632781
  • Filename
    4632781