Title :
A 102dB dynamic range audio sigma-delta modulator in 40nm CMOS
Author_Institution :
MediaTek Inc., Hsinchu, Taiwan
Abstract :
A second-order audio sigma-delta modulator has been implemented in 40nm CMOS with 0.05mm2. Hybrid mode operation with comparator reduction technology is designed under optimized system synthesis model. DAC element selection with positive and negative state scrambling is provided in the design. A start-up sequence including RC calibration and signal monitoring is developed to prevent unstable operation. The measured results show 90dB SNDR, 98dB THD, and 102dB dynamic range with-in 24kHz bandwidth, while consuming 500μW of total power at 6.5MHz sampling.
Keywords :
CMOS digital integrated circuits; calibration; comparators (circuits); digital-analogue conversion; sigma-delta modulation; CMOS technology; DAC element selection; RC calibration; bandwidth 24 kHz; comparator reduction technology; dynamic range audio sigma-delta modulator; frequency 6.5 MHz; gain 102 dB; gain 98 dB; hybrid mode operation; noise figure 90 dB; optimized system synthesis model; power 500 muW; second-order audio sigma-delta modulator; signal monitoring; size 40 nm; start-up sequence; Capacitors; Clocks; Dynamic range; Modulation; Noise; Sigma delta modulation; Topology;
Conference_Titel :
Solid State Circuits Conference (A-SSCC), 2011 IEEE Asian
Conference_Location :
Jeju
Print_ISBN :
978-1-4577-1784-0
DOI :
10.1109/ASSCC.2011.6123559
