A 2-GHz digital I/Q modulator in 65-nm CMOS

We propose a novel digital I/Q modulator implemented in 65 nm CMOS technology. Using in-phase (I) and quadrature-phase (Q) clock signals with a 25% duty cycle, the modulator can directly construct the RF output signal using four transistor switch banks with a power combiner. The circuit achieves 12.6 dBm peak output power and 20% peak drain efficiency at 2 GHz. While providing 6 dBm output power, the error vector magnitude (EVM) is 3.7% and could be used as pre-driver or final transmit stage. The first ever all-digital I/Q RF-DAC prototype is thus experimentally demonstrated.