• DocumentCode
    2940170
  • Title

    A 0.2–0.6 V ring oscillator design using bootstrap technique

  • Author

    Ho, Yingchieh ; Yang, Yu-Sheng ; Su, Chauchin

  • Author_Institution
    Inst. of Electr. Control Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • fYear
    2011
  • fDate
    14-16 Nov. 2011
  • Firstpage
    333
  • Lastpage
    336
  • Abstract
    This paper presents a bootstrapped inverter based ring oscillator for 0.2-0.6V operation. The proposed delay cell provides a boosted voltage swing to enhance the driving capability and suppress the large process variation in the low-voltage region. As compared with conventional inverter-based ring oscillators, the proposed one provides better linearity when controlled by the supply voltage. A test chip is fabricated in 90 nm SPRVT Low-K CMOS process. The measured results demonstrate that the proposed bootstrapped ring oscillator oscillates at 48MHz (771MHz) with a power consumption of at 0.63μW (87.6μw) and a phase noise of -93dBc/Hz (-88.5dBc/Hz) at a 1-MHz offset under a supply voltage of 0.2V (0.6V) VDD.
  • Keywords
    CMOS analogue integrated circuits; UHF integrated circuits; UHF oscillators; bootstrap circuits; logic gates; phase noise; SPRVT low-k CMOS process; boosted voltage swing; bootstrap technique; bootstrapped inverter; bootstrapped ring oscillator design; delay cell; frequency 48 MHz; frequency 771 MHz; phase noise; power 0.63 muW; power 87.6 muW; size 90 nm; voltage 0.2 V to 0.6 V; Computer architecture; Delay; Linearity; Microprocessors; Ring oscillators; Semiconductor device measurement; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Circuits Conference (A-SSCC), 2011 IEEE Asian
  • Conference_Location
    Jeju
  • Print_ISBN
    978-1-4577-1784-0
  • Type

    conf

  • DOI
    10.1109/ASSCC.2011.6123581
  • Filename
    6123581