Correlations between well potential and SEUs measured by well-potential perturbation detectors in 65nm

We measures and investigate the correlation between well potential and SEUs to effectively detect SEUs by well potential perturbation. Cell-based perturbation detectors are implemented adjacent to FFs constructed a shift register. They measures the locations of voltage levels over 0.6 or 0.8 V. The measurement results by neutron irradiation on a 65nm bulk CMOS shows that almost 90% of SEUs are generated without any well potential perturbation. We also shows that the well-potential elevation over 0.8 V activates bipolar actions on neighbourhood transistors which prevents SEUs.