Title :
Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOS
Author :
Amberg, Philip ; Liu, Frankie ; Dayringer, Michael ; Lexau, Jon ; Patil, Dinesh ; Gainsley, Jon ; Moghadam, Hesam Fathi ; Alon, Elad ; Zheng, Xuezhe ; Cunningham, John E. ; Krishnamoorthy, Ashok V. ; Ho, Ron
Author_Institution :
Oracle Labs., Redwood Shores, CA, USA
Abstract :
Digital “assist” circuits can improve the efficiency of traditionally analog circuit blocks, especially as technologies scale to the detriment of analog blocks. We apply some of these techniques to a 10 Gbps optical reciever, and demonstrate 395 fJ/b energy efficiency. Digital calibration blocks wrapped around a simple analog core enabled offset compensation, TIA biasing, and DLL re-timing, and cost negligible performance and power overhead. The assist circuits cost around 40% area overhead.
Keywords :
CMOS analogue integrated circuits; optical receivers; CMOS technology; DLL retiming; TIA biasing; analog circuit blocks; analog core; bit rate 10 Gbit/s; digital calibration blocks; digitally-assisted analog circuits; offset compensation; optical receiver; power overhead; size 40 nm; Analog circuits; CMOS integrated circuits; Calibration; Clocks; Optical receivers; Photodiodes; Silicon;
Conference_Titel :
Solid State Circuits Conference (A-SSCC), 2011 IEEE Asian
Conference_Location :
Jeju
Print_ISBN :
978-1-4577-1784-0
DOI :
10.1109/ASSCC.2011.6123656
