A compensation technique for sigma-delta analog-to-digital converters

This paper explores a compensation technique for mismatched amplifier gain and capacitor values in a three stage, third order noise shaping sigma-delta analog-to-digital converter (ADC). The paper concentrates on multistage noise shaping (MASH) architectures. Two possible sources of distortion are examined and simulated. Using these simulation results, the distortion is identified, and a modified architecture is designed that attempts to compensate for these distortion terms. Simulation results show that the distortion caused by finite operational amplifier gains (all near 60 dB) may be reduced by over 13 dB over the operating band of the converter by using the modified architecture