Fault tolerant routing algorithms for Hyper-de Bruijn networks

Author

Ngoc Chi Nguyen ; Thanh Vu-Dinh

Author_Institution

Dept. of Telecommun. Eng., HoChiMinh City of Univ. Technol., Ho Chi Minh City, Vietnam

fYear

2013

fDate

1-5 July 2013

Firstpage

803

Lastpage

808

Abstract

Fault tolerant routing has been investigated to overcome the failure encountered during routing in Very large scale integrated circuits (VLSI). In recent years, researchers have proposed the use of Hyper-de Bruijn graph as a physical topology for VLSI. In this paper, we proposed a new approach to provide fault tolerant routing which hasn´t been investigated on Hyper-de Bruijn network. The proposed approach is based on multi level discrete set concept in order to find a fault free shortest path among several paths provided. We also prove our fault tolerant routing algorithm to have the best performance among fault tolerant routing algorithms in Hyper-de Bruijn network.

Keywords

VLSI; fault tolerance; graph theory; integrated circuit design; integrated circuit interconnections; network routing; Hyper-de Bruijn graph; Hyper-de Bruijn networks; VLSI; fault tolerant routing algorithms; very large scale integrated circuits; High definition video; Program processors; Hypercube graph; de Bruijn graph; fault free shortest path; fault tolerant; hyper-de Bruijn; hyper-de Bruijn-Aster (HD*); interconnection network; shortest path;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless Communications and Mobile Computing Conference (IWCMC), 2013 9th International

Conference_Location

Sardinia

Print_ISBN

978-1-4673-2479-3

Type

conf

DOI

10.1109/IWCMC.2013.6583660

Filename

6583660