DocumentCode :
2943799
Title :
Tapeout Execution System (TES), a key enabler of DFM/Co-optimization
Author :
Mouli, Chandra ; Winstead, Charles H.
Author_Institution :
Intel Corp. Hillsboro, Hillsboro
fYear :
2007
fDate :
15-17 Oct. 2007
Firstpage :
1
Lastpage :
4
Abstract :
Tapeout has evolved from an event marking the end of design to a process where substantial compute resources are used to apply reticle enhancement techniques to product design prior to mask manufacturing. A tapeout execution system (TES) has been developed that provides centralized visibility, controllability and automated execution to the entire tapeout process. TES provides a system for identifying and removing process bottlenecks, quality issues, and compute inefficiencies, resulting in faster tapeout throughput with fewer resources and with higher quality. Furthermore, the TES model provides a framework for data exchange that strengthens the integration between design and manufacturing.
Keywords :
design for manufacture; integrated circuit design; integrated circuit manufacture; DFM/co-optimization; TES model; centralized visibility; controllability; data exchange; design for manufacturing; mask manufacturing; process bottlenecks removal; product design; reticle enhancement techniques; semiconductor industry; tapeout execution system; Design for manufacture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Manufacturing, 2007. ISSM 2007. International Symposium on
Conference_Location :
Santa Clara, CA
ISSN :
1523-553X
Print_ISBN :
978-1-4244-1141-2
Electronic_ISBN :
1523-553X
Type :
conf
DOI :
10.1109/ISSM.2007.4446787
Filename :
4446787
Link To Document :
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