Qualification of immersion double patterning

Semiconductor manufacturers expect 193nm immersion lithography, supplemented by double patterning techniques, to remain the dominant patterning technology through the 32nm technology node. In this work, we examine focus-exposure and overlay data that show potential challenges for qualification and control of immersion lithography in double patterning applications. Although careful characterization has enabled significant engineering advances in the past year or two, overlay remains a concern for double patterning. Higher-order models and more efficient sampling are required to reach sub-2.5nm targets for model residuals.