Cache memory design for embedded systems based on program locality analysis

Author

Giorgi, Roberto ; Prete, Cosimo Antonio ; Prina, Gianpaolo

Author_Institution

Dipt. di Ingegneria della Inf, Pisa Univ., Italy

fYear

1997

fDate

21-23 Jul 1997

Firstpage

16

Lastpage

18

Abstract

Cache memory design in embedded systems can take advantage from the analysis of the software that runs on that system, which usually remains the same for its whole life. Programs can be characterized, in respect of the memory hierarchy, using locality analysis. We propose an environment which permits one to analyze the locality of a program and the effects on the target system performance. The student can thus figure out the best tradeoff between costs and performance for cache memory and timings, exploring different system configurations. A fully graphical interface permits one to observe the program behavior from many points of view: locality surface, working set evolution, and performance metrics. The tool is currently used as a teaching tool at our University and it is distributed as part of a commercial development environment for embedded systems

Keywords

CAD; cache storage; computer aided instruction; computer science education; graphical user interfaces; real-time systems; timing; cache memory design; embedded systems; graphical interface; locality surface; memory hierarchy; performance metrics; program behavior observation; program locality analysis; target system performance; timings; working set evolution; Application software; Cache memory; Computer architecture; Costs; Embedded software; Embedded system; High performance computing; Microprocessors; System performance; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Systems Education, 1997. MSE '97. Proceedings., 1997 IEEE International Conference on

Conference_Location

Arlington, VA

Print_ISBN

0-8186-7996-4

Type

conf

DOI

10.1109/MSE.1997.612528

Filename

612528