The architecture of fuzzy PID gain conditioner and its FPGA prototype implementation

Author

Li, Jing ; Hu, Bao-Sheng

Author_Institution

Syst. Eng. Inst., Xian JiaoTong Univ., Xian, China

fYear

1996

fDate

21-24 Oct 1996

Firstpage

61

Lastpage

65

Abstract

Tuning the parameters of PID controller is very important in process control. This paper proposes a FPGC (Fuzzy PID Gain Conditioner) algorithm, a method based on fuzzy control, which tunes the PID controller online. The VLSI architecture of the algorithm is presented in this paper. It can not only realize the algorithms effectively but also improve the performance of the controller significantly. The FPGA prototype implementation based on this VLSI structure is also given. Finally, a virtual control system is used to test the effectiveness of the design

Keywords

VLSI; field programmable gate arrays; fuzzy control; gain control; process control; three-term control; FPGA prototype implementation; FPGC; VLSI structure; fuzzy PID gain conditioner; process control; virtual control system; Application specific integrated circuits; Control systems; Field programmable gate arrays; Fuzzy control; Fuzzy sets; Fuzzy systems; Prototypes; Signal processing algorithms; Three-term control; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 1996., 2nd International Conference on

Conference_Location

Shanghai

Print_ISBN

7-5439-0940-5

Type

conf

DOI

10.1109/ICASIC.1996.562751

Filename

562751