DocumentCode :
2946597
Title :
VHDL Simulation of magnetic domain wall logic
Author :
Klein, J. ; Belhaire, E. ; Chappert, C. ; Cowburn, R. ; Petit, D. ; Read, D.
Author_Institution :
Inst. d´´Electron. Fondamentale, Orsay
fYear :
2006
fDate :
8-12 May 2006
Firstpage :
740
Lastpage :
740
Abstract :
The exponential growth of digital circuit complexity requires to automate their design flows. Automatic synthesis tools and hardware description language such as VHDL allow nowadays to rapidly design very complex circuits containing thousands or even millions of transistors. At each step of the design flow, comparative simulations ensure the coherency among the various views, from the most abstract to the most physical. We have applied this approach to the magnetic domain wall logic (MDWL), building on the recently demonstrated set of basics logic gates.
Keywords :
circuit complexity; hardware description languages; logic gates; magnetic domain walls; VHDL simulation; automatic synthesis tools; basics logic gates; digital circuit complexity; hardware description language; magnetic domain wall logic; Buildings; Circuit simulation; Circuit synthesis; Counting circuits; Logic gates; Magnetic domain walls; Magnetic fields; Magnetization; Physics; Signal synthesis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Magnetics Conference, 2006. INTERMAG 2006. IEEE International
Conference_Location :
San Diego, CA
Print_ISBN :
1-4244-1479-2
Type :
conf
DOI :
10.1109/INTMAG.2006.376464
Filename :
4262173
Link To Document :
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