DocumentCode :
2947369
Title :
Abstraction and microarchitecture scaling in early-stage power modeling
Author :
Jacobson, Hans ; Buyuktosunoglu, Alper ; Bose, Pradip ; Acar, Emrah ; Eickemeyer, Richard
Author_Institution :
IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA
fYear :
2011
fDate :
12-16 Feb. 2011
Firstpage :
394
Lastpage :
405
Abstract :
Early-stage, microarchitecture-level power modeling methodologies have been used in industry and academic research for a decade (or more). Such methods use cycle-accurate performance simulators and deduce active power based on utilization markers. A key question faced in this context is: what key utilization metrics to monitor, and how many are needed for accuracy? Is there a systematic way to select the “best” markers? We also pose a key follow-on question: is it possible to perform accurate scaling of an abstracted model to enable exploration of new microarchitecture features? In this paper, we address these particular questions and examine the results for a range of abstraction levels. We highlight innovative insights for intelligent abstraction and microarchitecture scaling, and point out the pitfalls of abstractions that are not based on a systematic methodology or sound theory.
Keywords :
power aware computing; early stage power modeling; microarchitecture level power modeling methodologies; microarchitecture scaling; utilization metrics; Accuracy; Clocks; Correlation; Latches; Mathematical model; Microarchitecture; Training;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computer Architecture (HPCA), 2011 IEEE 17th International Symposium on
Conference_Location :
San Antonio, TX
ISSN :
1530-0897
Print_ISBN :
978-1-4244-9432-3
Type :
conf
DOI :
10.1109/HPCA.2011.5749746
Filename :
5749746
Link To Document :
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